Paolo is a Vice President and HPE Fellow and directs the Artificial Intelligence Research Lab (AI Research Lab) at Hewlett Packard Labs (Hewlett Packard Enterprise). He currently lives in Palo Alto, CA.
The AI Research Lab is a cross-disciplinary group whose charter is advance technology and solutions for machine learning, research AI for science, develop AI data foundations, and explore novel acceleration techniques. Here's a pointer to a blog post about some interesting NLP research by the team and here's a link to a keynote on acceleration at ICRC18.
Paolo's interests skirt the boundary of hardware and software, including servers and systems-on-chip, workload-optimized, highly-parallel and distributed systems, ILP and VLIW processor architectures, compilers and embedded systems, artificial intelligence. Paolo is an IEEE Fellow for "contributions to embedded processor architecture & system-on-chip technology"
At HPE, he previously led Exascale computing research (2017-2019), advancing HPC systems to tackle performance leadership at scale. In the past, he was the lead of “The Machine" hardware architecture (2014-2016), researching how we can build better architectures and systems around memory semantics with non-volatile memory for big data applications. A great series of independent articles on The Machine project by TheNextPlatform is available here. Much of TheMachine technology became the foundation of HPE's Exascale high-performance computing strategy and helped address some of the challenges in the race to Exascale. Here is a short video on Exascale research and a related blog post
From 2011 to 2014 he worked on HP's Project Moonshot, a platform of workload optimized, software-defined servers addressing the energy efficiency challenges of hyper scale data centers. His research on system-level (SoC) integration for low energy servers and scale-out architectures was a key element of Project Moonshot. On low power servers, here is the HiPEAC 2014 Keynote ("The Perfect Storm"), a Jan 2012 article (Brazil) on low power servers (English translation), and a June 2012 keynote at the 2012 EcoCloud annual event.
From 2006 to 2010 Paolo led the HP Labs group in Barcelona on system-level modeling and simulation. Paolo's team developed a simulation platform (COTSon) whose goal was to model large-scale computing systems of thousands of multi-/many-core processors and their interconnection network. COTSon was released as Open Source in Jan 2010 and is available at http://cotson.sourceforge.net.
In 2003 Paolo started the Barcelona Research Office (BRO), a satellite HP Labs organization expanding HPL’s research presence in continental Europe. Initially, the BRO team researched the parallel computing aspects of content-processing applications and developed the large-scale content processing system (Chronos) used to recapture 80 years of TIME magazines (see Time Archive + HP) whose result is now available in the Time Vault.
From 1995 to 2002 Paolo was the technical lead of the “Custom-Fit Processors” Project at HP Labs Cambridge, whose goal was to build software-defined CPU cores, highly optimized for a given application domain. In that role, he was the principal architect of the instruction set architecture (ISA) of the Lx/ST200 family of VLIW embedded processor cores (developed as a partnership between HP Labs and STMicroelectronics). He supervised the design of the prototype compiler and simulator, the interface with the microarchitecture team, the application tuning activities, and the technology transfers. The ST200 family has been used for over a decade in a variety of audio, video and imaging consumer products, including HP's printers and scanners. As of the 2009 article in the "IEEE Solid State Circuit Magazine", STMicroelectronics has shipped over 40 million systems-on-chip for digital video containing one or more VLIW processor core from the ST200 family.
Paolo is an active member of the computer architecture community, and regularly serves in program and organization committees. He was Program Co-Chair for ICRC 2019 (IEEE Intl. Conference on Rebooting Computing). He was guest editor of the 2012 edition of IEEE Micro TopPicks. He was Program Chair for HiPEAC10 (2010), MICRO41 (2008) and in for MICRO34 (2001). He also was General Chair for MICRO38 (2005), Program Chair for CASES'03 (2003) and General Chair for CASES’05 (2005). He is a co-author (with Josh Fisher and Cliff Young) of the book “Embedded Computing: a VLIW approach to architecture, compiler end tools”). Paolo also serves in the industrial advisory board of the HiPEAC European network of excellence since 2008, and contributed to define the 2011 HiPEAC Research Roadmap.
He is a co-inventor in 60 granted patents and several others patent applications.
Before joining HP in 1994, Paolo received a PhD (Dottorato) in EECS in 1993 and an M.S. (Laurea) in Electrical Engineering in 1989 from the University of Genoa (Italy).
